... | @@ -188,62 +188,74 @@ This section covers all performance patterns for the GPU side of applications. |
... | @@ -188,62 +188,74 @@ This section covers all performance patterns for the GPU side of applications. |
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---
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---
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#### Thread load-imbalance
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#### Host-device memory operations
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**Issue**
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**Issue**
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Slowdown due to memory transfers.
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**Performance Behavior**
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**Performance Behavior**
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Many small copies from host to device.
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Low bandwidth of memory transfers.
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**Performance counters**
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**Performance counters**
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MemUnitBusy.
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**Fix**
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**Fix**
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Fuse memory transfer operations as much as possible.
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Remove redundant transfers.
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Use pinned memory instead of non-pinned memory (on some systems non-pinned memory transfers are several times slower than pinned).
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---
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---
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#### Thread divergence
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#### Device load and occupation
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**Issue**
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**Issue**
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The accelerator is underloaded, resulting in poor memory bandwidth and arithmetic throughput.
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**Performance Behavior**
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**Performance Behavior**
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Number of wavefronts is lower than theoretical maximum.
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**Performance counters**
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**Performance counters**
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Compare the number of wavefronts to theoretical peak (Wavefronts).
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See the arithmetic unit load naturally increase when device load increases (VALUBusy)
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If shared memory is not used, check if the number of registers are a limiter (spi_vwc_csc_wr & spi_swc_csc_wr).
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**Fix**
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**Fix**
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Increase workload for the device.
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---
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---
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#### High branching
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#### Global memory traffic
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**Issue**
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**Issue**
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The memory bandwidth is not fully utilized.
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**Performance Behavior**
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**Performance Behavior**
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Average bandwidth of memory transfer operations falls down several times.
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**Performance counters**
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**Performance counters**
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AI signifies memory bound application (VALUBusy).
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Saturation of memory bus (MemUnitStalled).
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**Fix**
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**Fix**
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Coalesce memory access patterns.
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Increase workload or decrease size of offloaded code.
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---
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---
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#### Non-cached memory access
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#### Accelerator kernels granularity
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**Issue**
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**Issue**
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The overhead of launching kernels is bigger than benefit.
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**Performance Behavior**
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**Performance Behavior**
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Low execution times of individual kernels, but many are launched.
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**Performance counters**
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**Performance counters**
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?
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**Fix**
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**Fix**
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Fuse kernels together. Sometimes possible to do automatically, sometimes requires manual work.
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---
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---
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#### Bandwidth saturation/limitation
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#### Divergent branching overhead
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**Issue**
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**Issue**
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Excessive branching reducing
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**Performance Behavior**
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**Performance Behavior**
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There is low utilization of the ALUs.
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**Performance counters**
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**Performance counters**
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VALUUtilization.
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**Fix**
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**Fix**
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Remove branching factors from code.
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---
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---
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#### SM load imbalance
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#### Shared memory bank conflicts
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**Issue**
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**Issue**
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**Performance Behavior**
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**Performance Behavior**
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... | @@ -254,7 +266,7 @@ This section covers all performance patterns for the GPU side of applications. |
... | @@ -254,7 +266,7 @@ This section covers all performance patterns for the GPU side of applications. |
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---
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---
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#### Insufficient workload
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#### Impact of atomic operations
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**Issue**
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**Issue**
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**Performance Behavior**
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**Performance Behavior**
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... | @@ -265,15 +277,6 @@ This section covers all performance patterns for the GPU side of applications. |
... | @@ -265,15 +277,6 @@ This section covers all performance patterns for the GPU side of applications. |
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---
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---
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#### Synchronization issues
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**Issue**
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**Performance Behavior**
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**Performance counters**
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**Fix**
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# Subpages
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# Subpages
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- [Intel Advisor & Intel VTune](3.a.-Intel-Offload-Advisor-&-Intel-VTune) |
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- [Intel Advisor & Intel VTune](3.a.-Intel-Offload-Advisor-&-Intel-VTune) |
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\ No newline at end of file |
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